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J037 SEP Version 1 Issue 3. 1987-01-21 | © Arcom Control Systems Ltd. 1987 |
Manual | PCB | Comments |
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Ver 1 Iss 3 | Ver 1 Iss 3 | 1987-01-21 first published in this format |
The SEP is an EPROM programmer board for STEbus computer systems. It is used for EPROM programming, reading and verification. The board has a number of advanced features that mean that it can program practically any 27-series EPROM currently available, without inserting 'personality modules' or rewiring the board. EPROMs of type 2716 (2K bytes), 2732 (4K Bytes), 2764 (8K bytes), 27128 (16K bytes) and 27256 (32K bytes) can be programmed by reconfiguring the board in software. EPROMs of type 27512 (64K bytes) can also be programmed if a switch on the board is set to a different position.
The board can program EPROMs with any programming voltage up to 25.5V, because it has an on-board DC-DC converter that is driven from a digital-to-analogue converter (D/A). The programming voltage can be set to an accuracy of 0.1V in software, so the board will be able to cope with new lower-programming voltage EPROMs when they become available.
Another useful feature is that the VCC supply to the EPROM can be either 5V or 6V, again selectable in software. This allows verification of a byte at a higher than normal voltage, to ensure that it has been properly programmed.
A monostable that generates 1 ms pulses can be triggered and read from software, so that software timing loops, which depend on processor speed and wait-states, need not be used. These features have been included in the design so that the intelligent programming algorithms now recommended by some EPROM manufacturers may be used. Typically, these algorithms involve programming a byte with 1 ms pulses until it is fully programmed, reading the byte back after each program pulse, then using a few more pulses, and verifying at a higher than normal VCC. The time taken to program a large EPROM can be reduced considerably by this method.
The board is I/O-mapped on the STEbus: it uses six I/O locations which can be set to one of 256 address groups in the 12-bit STE I/O space. A jumper option to ignore the top 4 bits of the 12-bit address makes programming easier with processor boards that cannot generate 12-bit addresses.
The board base address is selected by IC3, an 8-bit comparator. Jumpers A to H set the comparison address on the top 8 bits of the STE I/O address. Jumpers short to ground, so "no jumpers" gives an address of FFF. Comparison of the top 4 address bits can be disabled which provides a choice of 16 possible locations for the board. Select signals go to IC4; a logic array that decodes chip selects. These chip-selects go to the D/A converter (IC9), the latch (IC8) which produces control signals and the buffer for the status line (IC7). STEbus signals are buffered by IC1, 2, 3 and 6, with IC5 providing time delays. The STEbus is asynchronous and once a bus cycle has started it will not complete until the bus master receives an acknowledge signal on the DATACK* line from IC5 via TR1.
IC10 is a switch-mode power supply driver whose output is buffered by TR2, and can be switched by relays to several pins on the zero-insertion-force (ZIF) socket. The relays are control LED from IC8, an octal latch. There is a high-voltage op-amp in IC10 that drives the output stage, and the D/A output provides the control voltage. The programming voltage can be switched to pin 1 of the ZIF socket by switch S1B, or an output from IC8 can be used to provide the A15 line for 27512 EPROMs, and the state of this switch can be read in software through buffer IC7. The monostable output can also be read through IC7. The monostable is triggered by a write to the control latch IC8.
The supply voltage to the EPROM being programmed is derived from the +12V line via regulator REG1, and the regulated output may be increased by transistor TR3 to approximately 6V. Both the supply and programming volts to the ZIF socket may be turned off by RL3.
The address and data lines to the EPROM are driven by IC12, an 8255 parallel I/O device. Port A of IC12 reads or writes data, and Ports B and C are used to set up addresses. Bit 7 of Port C enables the outputs of IC8 when it is low, so that the relays do not switch on at random from power-up.
Note:
+ = the standard jumper connection, as supplied.
* = the signal is active-low.
The board is described as if you were viewing it from the component side with the 64-way bus connector to the right.
Fig. 1. Link Positions
LK1H select if A4 low LK1G select if A5 low LK1F select if A6 low LK1E select if A7 low + LK1D1 ignore A8 LK1D2 select if A8 low + LK1C1 ignore A9 LK1C2 select if A9 low + LK1B1 ignore A10 LK1B2 select if A10 low + LK1A1 ignore A11 LK1A2 select if A11 low |
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With the standard jumpering shown above, the base address of the board is XF8 (hexadecimal) where the X indicates that the upper nibble is ignored. Note that not all operating systems and software drivers use the same standard address. You MUST check in the software manual.
The board will be selected when a particular combination of address bits and command modifiers is sent to it, with the strobe lines ADRSTB* and DATSTB* active. The command modifiers are those for I/O cycles - CM2 high, CM1 low and CM0 high or low for read or write. The address bits are determined by the jumpering on LK1, which sets what the top eight bits of the address are required to be, and the internal configuration of IC4, which deals with the lower four bits. STEbus I/O accesses use twelve of the twenty address lines.
If any of the jumpers A2, B2, C2, D2, E, F, G, H are inserted, the corresponding comparison address bits (A11 to A4), must be low for the board to be selected, as shown in the table above. For example, consider the base address of the board, which is the address of Port A of the 8255 (see the next section for more details). If all these jumpers are inserted, the base address is 008.
If one of the above jumpers is removed, the corresponding address bit must be high for the board to be selected. Thus, with no jumpers, the base address is FF8.
If jumpers A1, B1, C1, D1 are inserted, the top 4 bits of the 12-bit address are not used in the comparison, so with these jumpers in, the base address of the board is F8.
Switch S1B defines whether programming volts appear on pin 1 of the ZIF socket. This is required for 2764, 27128 and 27256 EPROMs, but pin 1 is address line A15 on 27512 EPROMs. This means that switch S1B can be set so that pin 1 gets programming volts for all EPROMs except 27512's. The state of the switch can be read because another pole of the switch is wired to bit 7 of the status port, so software can check whether the switch is set correctly.
The STEbus has a total of 4096 possible I/O addresses, corresponding to a 12-bit address bus. There are six I/O addresses to which the board will respond. The upper 8 bits of the 12-bit I/O address are set by jumpers, as described in the previous section, and the remaining four bits of the I/O address define the group of I/O addresses to which the board responds.
The table below shows the I/O addresses and the meaning of the bits at each address. With standard jumpering the base address of the board is F8 (most-significant four bits ignored).
Table 1. I/O Addresses
Address | bit | function | |
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XX8 | (read/write) | 7-0 | Port A of the 8255, IC12. Accesses D7-0 of the EPROM in the ZIF socket |
XX9 | (read/write) | 7-0 | Port B of the 8255, IC12. Outputs A7-A0 of the EPROM address. |
XXA | (read/write) | Port C of the 8255, IC12 | |
0 | EPROM pin 25 A8 | ||
1 | EPROM pin 24 A9 | ||
2 | EPROM pin 21 A10 | ||
3 | EPROM pin 23 if A11 | ||
4 | EPROM pin 2 A12 | ||
5 | EPROM pin 26 if A13 | ||
6 | EPROM pin 27 A14/PGM* | ||
7 | This bit low enables outputs of IC8, the control latch | ||
XXB | (write) | 7-0 | Control port of the 8255, IC12. Only two bytes may be sent to this address 80 (hex) makes Ports A, B and C output for programming EPROMs 90 (hex) makes Port A input and Ports B and C output for reading EPROMs |
XXC | (write) | 7-0 | DAC. A byte written to this address will make the VPP generator produce the voltage corresponding to the byte divided by 10. For example, writing FF (255 decimal) gives 25.5V, writing 80, (128 decimal) gives 12.8V, and so on. |
XXD | (read) | 5-0 | not used |
6 | Monostable output. A low on this bit indicates that the monostable was triggered within the last millisecond | ||
7 | State of switch S1A. A high on this bit indicates that S1A is made, i.e. the EPROM is not to be programmed as a 27512. A low indicates that you have set the switch for programming a 27512 | ||
XXD | (write) | Control latch (IC8). NOTE: a write to this address triggers the monostable. | |
0 | low switches VPP to EPROM pin 23 | ||
1 | EPROM pin 20 | ||
2 | high makes EPROM VCC 5V, low makes it 6V | ||
3 | low switches VCC to EPROM pin 26 | ||
4 | low switches VPP to EPROM pin 22 | ||
5 | EPROM pin 22 if OE* | ||
6 | EPROM pin 1 if A15 (27512 only) | ||
7 | a high on this bit switches on VCC to the EPROM and the VPP generator |
See the section on 'Links and Options' for details on how to define the "XX' part of the addresses described above.
In the following example, it is assumed that the board is jumpered as standard, so that it responds to addresses F8 to F0.
Several software packages are available for programming EPROMs with this board. They are usually menu-driven, and ask you for information about EPROM type and programming voltage. For example, a disk-based program is supplied with CP/M, an EPROM-based program exists in the SCPUB monitor, and routines to program EPROMs are part of the EPROM version of BASIC. The following information is included in case you wish to write your own software.
This table summarises the pinouts of the types of EPROM that can be programmed by the SEP board.
Figure 2. EPROM pinouts
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These pins are common to all the EPROMs the SEP can
program. Table 2. EPROM pinout differences
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You will see that several pins can have different functions, depending on the EPROM type. All these differences can be accommodated by the relays on-board, with the exception of pin 1 of a 27512, which has to be switched.
When the configuration of an 8255 is altered, for example when it is changed from output on Port A for programming to input on Port A for verification, all outputs are zeroed. In certain configurations this can have serious consequences if the correct sequence of operations is not followed, because a false program pulse can be sent to the wrong address. The ordinary programming algorithm, used for 2716, 2732 and some 2764 EPROMs, involves one program pulse of up to 50 ms duration for each byte to be programmed.
A typical sequence of operations is;
Repeat steps 11 and 12 typically 45 times, to program one location.
Repeat steps 8 to 13 for all the addresses to be programmed
The Intelligent Programming Algorithm used to program 27128, 27256, 27512 and some 2764 EPROMs, involves one-millisecond programming pulses, repeated until the location verifies correctly, with extra pulses to make sure the location is programmed fully.
This requires that the 8255 is sequenced between Port A out and Port A in, and the control sequence must be correct to avoid programming the wrong location.
IC1,2 74LS245 IC3 74LS688 IC4 logic array IC5 74LS174 IC6 74LS14 IC7 74LS368 IC8 74LS374 IC9 ZN428 |
IC10 78S40 IC11 74121 IC12 8255 REG1 7805 TR1 NPN switching TR2,3,4 NPN D1-5,7 1N4148 D6 LED |
R1 2k2 R2 Omit R3 390R R4,5,7,13 1k0 R6 10k R8 1R0 R9 33k R10 1k5 R11 4k7 |
R12 30k R14 120R R15 4k7 R16,17,23 4k7 R18,19,20,21 22k R22 560R VR1 200R RP1 4k7 |
C1-4,7-9 decoupling C5 not fitted C6,8 100n C10 22μ C12 100n C13 10μ C14 100n C15 47n C16 4n7
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The pin 1 end of the EPROM is the end
with the semi-circular notch or a spot near pin 1, and
this end goes nearest to the LED. If you have a 28-pin EPROM (2764 or larger) there is only one way you can insert the EPROM. If you have a 24-pin EPROM, insert it so that the four empty holes in the socket are between the EPROM and the LED. The EPROM is inserted into the
28-way zero-insertion-force (ZIF) socket, with the pin 1
end nearest the LED. |
Operating temperature | 5 °C to 55 °C | |
Power Consumption (typ.) | 5V ± 0.25V +12V ± 1V |
350 mA 120 mA |
EPROM capacity | 2716 (2K) 2732 (4K) 2764 (8K) 27128 (16K) 27256 (32K) 27512 (64K) |
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Programming voltage | Software-selectable in 100 mV steps, 0V to 25.5V | |
EPROM supply voltage | Software-selectable, 5V or 6V (approx.) | |
On-board timer | 1 ms pulse | |
Bus | STEbus | |
Bus connector | 64 a/c DIN41612 | |
Format | Single Eurocard | |
Dimensions | 167 × 100 × 15 mm | |
Weight | 170 g |